Embodiments of the invention relate generally to magnetoresistive random access memory (MRAM) and, more specifically to a two-adder thermal MRAM.
Magnetoresistive random access memory (MRAM) is a non-volatile computer memory (NVRAM) technology. Unlike conventional RAM chip technologies, MRAM data is not stored as electric charge or current flows, but by magnetic storage elements. The elements are formed from two ferromagnetic plates, each of which can hold a magnetic field, separated by a thin insulating layer. One of the two plates is a reference magnet set to a particular polarity; the other plate's field can be changed to match that of an external field to store memory and is termed the “free magnet” or “free-layer”. The free magnet may also be referred to as a bit, and it may store a “1” or a “0” value. This configuration is known as a magnetic tunnel junction and is the simplest structure for a MRAM bit. A memory device is built from a grid of such “cells.”
One method of reading is accomplished by measuring the electrical resistance of the cell. A particular cell is (typically) selected by powering an associated transistor which switches current from a supply line through the cell to ground. Due to the magnetic tunnel effect, the electrical resistance of the cell changes due to the orientation of the magnetization in the two plates. By measuring the resistance of any particular cell, the direction of magnetization of the writable plate can be determined.
One type of MRAM, called thermal MRAM, is configured to have heat applied to the tunnel junction when writing to a bit of the tunnel junction. In particular, the free magnet tends to be stable and more difficult to write to, or change magnetic polarity, at a normal operating temperature. Providing heat to the free magnet may facilitate changing of a polarity of the free magnet. In conventional thermal MRAM, current flows through the tunnel junction to heat the free magnet, and the current has been limited by the characteristics of the thin insulating layer, since providing an over-current through the tunnel junction could cause a failure of the thin insulating layer in the tunnel junction. Conventionally, a resistance of the thin insulating layer may be around 1 kΩ, or in a range from around 1 kΩ to 10 kΩ, and the current flow through such a thin tunnel junction can damage the tunnel barrier.